ESD impact on production yield and product quality is increasingly becoming more significant due to requirements for higher speeds and device scaling. In general, ESD protection devices work by providing a path through the IC that has high current shunting capabilities. Centralized and local clamps are used to allow high ESD current to be discharged to ground. Likewise, forward-biased diodes are also a key protection device. For example, adverting to FIG. 1A, when the IO voltage is greater than VDD, diode 101 provides a discharge path to VSS along path 103. Similarly, when the IO voltage is less than VSS, diode 107 provides a discharge path to VSS along path 109 as depicted in FIG. 1B.
A known approach for an ESD diode includes the use of a polysilicon (poly) gated diode protection device, as illustrated in FIG. 2. As shown, a poly gate 201 with sidewall spacers 203 is formed on a p-well 205 with a p-type source/drain region 207 on one side, acting as an anode, and an n-type source/drain region 209 on the other side, acting as a cathode. Poly gate advantages include low on-state resistance (Ron), fast turn-on, and self-aligned anode and cathode electrodes. However, polysilicon has low thermal conductivity (κ) and low heat capacity (CV), which causes high self-heating under the gate and, therefore, low robustness for the device.
A need therefore exists for methodology enabling formation of a gated diode protection device that has low self-heating, and the resulting device.